CAD Tools:

SYNOPSYS:

• Fusion compiler
• PrimeTime
• Formality

CADENCE:

• Genus
• Innovus
• Tempus

Mock Interviews:

• We will conduct multiple Mock interviews to help candidates refine their approaches and gain confidence.

Qualification:

• BE/M.Tech/ME (EC, EE, EI, CS)

• Synthesis Requirements and Detailed Physical Synthesis Flow
• Timing Basics and Timing Analysis
• DFT Basics and DFT insertion.
• Synthesis Optimization Technics
• PPA trade-offs discussions.
• Logic Equivalency Checks between RTL vs Netlist

Hands on Project:

• Flow execution.
• PPA analysis
• Debug and driving the timing convergence
• Post synthesis Netlists Sanity/Quality checks.

CAD Tools:

• Fusion compiler (SYNOPSYS)
• Genus (CADENCE)

Mock Interviews:

• We will conduct multiple Mock interviews to help candidates refine their approaches and gain confidence.

Qualification:

• BE/M.Tech/ME (EC, EE, EI, CS)

• PD flow with Synopsys and Cadence test cases.
• Floor planning and power planning concepts with practical Examples
• Detailed discussion about Each stage with practical Examples.
• Stage by stage QOR Analysis like Utilization, congestion, Timing and power
• Detailed discussion about PPA trade-offs in latest technologies.

Hands on Project:

• Flow execution with multiple floorplans.
• QoR analysis on executed runs
• Debugging and driving new runs based on existed QoR.
• Quality checks on post PD deliverables.

CAD Tools:

• Fusion compiler (SYNOPSYS)
• Innovus (CADENCE)

Mock Interviews:

• We will conduct multiple Mock interviews to help candidates refine their approaches and gain confidence.

Qualification:

• BE/M.Tech/ME (EC, EE, EI, CS)

• Reviewing the STA flow generated reports.
• Reports debugging and finding the root cause of Timing violations.
• Preparing Manual Timing Eco’s with respect to existed Timing violations.
• Discussion’s regarding different ECO flow’s
• How to do environment setup for Auto ECO generated flows.

Hands on Project:

• Flow execution with multiple test cases.
• Reports analysis on executed runs
• Debugging and preparing Timing ECO’s based on existed Timing violations.
• Working on ECO flows for auto ECO generation.
• SI Analysis

CAD Tools:

• PT/PTSI (SYNOPSYS)
• Tempus (CADENCE)

Mock Interviews:

• We will conduct multiple Mock interviews to help candidates refine their approaches and gain confidence.

Qualification:

• BE/M.Tech/ME (EC, EE, EI, CS)

Signoff Checks:

• Logical Equivalence check
• Physical Verification
• IR-Drop Analysis
• Electro Migration Analysis